For the circuit shown above, equivalent GATE is :

Related Formula

Boolean Algebra expressions for logic gates: NOT: A$\overline{A}$ OR: A + B$A + B$ NOR: A + B$\overline{A + B}$

Core Logic

Analyze the paths from inputs A and B to the final output Y.

Step 1: Intermediate Signals

Top OR gate inputs: A$A$ directly, and B$B$ inverted (B$\overline{B}$). Top OR gate output: A + B$A + \overline{B}$

Bottom OR gate inputs: A$A$ inverted (A$\overline{A}$), and B$B$ directly. Bottom OR gate output: A + B$\overline{A} + B$

Step 2: Final Gate Evaluation

The final gate is a NOR gate taking the two intermediate outputs as its inputs.

Notice that the inner sum simplifies cleanly:

Since A + A = 1$A + \overline{A} = 1$ and B + B = 1$B + \overline{B} = 1$, the inner term is 1 + 1 = 1$1 + 1 = 1$.

Step 3: Conclusion

The output Y is always 0 regardless of the inputs A and B. Checking the truth tables, only option 3 satisfies Y=0$Y=0$ for all conditions.

Pattern Recognition

When a Boolean expression groups a variable and its exact complement together in an OR configuration (A$A$ and A$\overline{A}$), the result instantly hits logic 1. Feeding 1 into any NOR gate guarantees a 0 output universally.

Chapter Mix

Class 12 Physics: Semiconductor Electronics

Related Formula

Core Logic

The inputs A$A$ and B$B$ are first passed through individual NOT gates (made from tied-input NAND gates or standard NOT gates). The outputs become A$\overline{A}$ and B$\overline{B}$.

These are then fed into a NAND gate. The final output Y$Y$ is:

Applying De-Morgan's Law:

Y = A + B$Y = A + B$

This represents an OR operation.

Pattern Recognition

Bubbled inputs on a NAND gate convert it directly into an OR gate via De-Morgan's laws. (Bubbled NAND = OR).

Chapter Mix

Class 12 Physics: Semiconductor Electronics